CMOS IC Layout Concepts, Methodologies, and Tools

Аннотация

Where does layout design fit in the overall chip development process? Chapter 1 gives a nontechnical overview of the entire process so that we can understand the layout designer's role. The mandate of an IC layout designer is to create the layout masks of various portions of a chip in compliance with engineering drawings, netlist or simulation results, and process design rules. To be capable of understanding and respecting engineering drawings, the designer needs to understand basic electricity rules and all the concepts related to the layout of gates. This will be covered in Chapter 2. Chapter 3 describes the manufacturing process and definition of layers. After we understand how the layers are coordinated to generate devices and connectivity, we learn about design rules. These are the manufacturing rules that must be followed to ensure that the chip can be reliably manufactured. The process engineers determine the minimum manufacturing grid, polygon, minimum distance between layers, etc. The design rules are the rules that are the factor, which together with the engineering drawings, netlist, etc., will fundamentally decide the architecture of the chip.